NVIDIA changes the HBM formula, and Samsung is adapting

Samsung is reportedly developing an 8-layer version of its HBM4E memory specifically for the NVIDIA NVHBM platform, marking a notable shift in how high-bandwidth memory could be designed for next-generation AI systems.

According to SEDaily, NVIDIA has asked Samsung to tailor its seventh-generation HBM4E around an 8-layer configuration for NVHBM, rather than the taller 12-layer and 16-layer stacks the company has been preparing.

The custom memory is also expected to target speeds of 17 to 18Gbps per pin, significantly above Samsung’s initial HBM4E sample specification of 16Gbps.

NVIDIA officially introduced NVHBM this week as part of its NVLink Fusion strategy. The company appears to be taking a different route for NVHBM, prioritizing speed, physical efficiency, and supply scalability.

NVHBM architecture moves the memory controller into the HBM base die, freeing space on the XPU while enabling up to 30% higher memory bandwidth and 15% lower HBM power consumption compared with standard HBM4E.

Samsung could benefit from this design direction because its semiconductor business combines DRAM, logic, advanced packaging and foundry capabilities.

The 8-layer NVHBM is reportedly being considered for NVIDIA’s future AI platforms, including the Vera Rubin Ultra generation.